2026

Computation Is Fast, Use T<scp>hreadlet</scp>!: Efficient Threading for μs-Scale Computing via OS/Hardware Co-Design

Y. Yao; X. Qin; Y. Fan; Y. Li; K. Hu et al.

2026. SOSP '26: ACM SIGOPS 32nd Symposium on Operating Systems Principles, Prague, Czech Republic, 2026-09-29 - 2026-09-02. p. 430 - 447. DOI : 10.1145/3830418.3843863.

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Accurate & Scalable Time-Based Sampling of Full-System Simulation

S. Lin; Y. Li; M. Alian; B. Falsafi; K. Lai

2026. 59th IEEE/ACM International Symposium on Microarchitecture, Athens, Greece, 2026-10-31 - 2026-11-04.

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PathSteiner: Improving PathFinder with Quasi-Optimal Steiner-Tree Initialization

S. Shrivastava; L. Kurešević; A. Poupakis; C. Ravishankar; D. Gaitonde et al.

2026. 2026 IEEE 34th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Atlanta, GA, USA, 2026-05-13 - 2026-05-16. p. 133 - 141. DOI : 10.1109/fccm68464.2026.00030.

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Out with LSQs: Custom Circuits for Memory Access Reordering in Dynamic HLS

R. Pirayadi; A. Elakhras; M. Stojilovic; P. Ienne

2026. 34th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, 2026-02-22 - 2026-02-24. p. 92 - 102. DOI : 10.1145/3748173.3779204.

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2025

FRESCO: Efficient Subgraph Enumeration for Scalable Clustering in Heterogeneous CGRAs

L. Coulon; A. Ragab; J. Anderson; M. Stojilovic; P. Ienne

2025. 2025 IEEE/ACM International Conference on Computer Aided Design, Munich, Germany, 2025-10-26 - 2025-10-30.

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Single-Address-Space FaaS with Jord

Y. Li; A. Bhattacharyya; M. Kumar; A. Bhattacharjee; Yoav Etsion et al.

2025. The 52nd Annual International Symposium on Computer Architecture, Tokyo, Japan, 2025-06-21 - 2025-06-25. p. 694 - 707. DOI : 10.1145/3695053.3731108.

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Avant-Garde: Empowering GPUs with Scaled Numeric Formats

M. Gil; D. Ha; S. B. Harma; M. K. Yoon; B. Falsafi et al.

2025. The 52nd Annual International Symposium on Computer Architecture, Tokyo, Japan, 2025-06-21 - 2025-06-25. p. 153 - 165. DOI : 10.1145/3695053.3731100.

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FRIDA: Reconfigurable Arrays for Dynamically Scheduled High-Level Synthesis

L. Coulon; L. Ramirez; J. Anderson; M. Stojilovic; P. Ienne

2025. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2025), Monterey, California, USA, 2025-02-27 - 2025-03-01. p. 147 - 158. DOI : 10.1145/3706628.3708880.

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Effective Interplay Between Sparsity and Quantization: from Theory to Practice

S. B. Harma; A. Chakraborty; E. Kostenok; D. Mishin; D. Ha et al.

2025. The Thirteenth International Conference on Learning Representations, Singapore, 2025-04-24 - 2025-04-28.

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Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox

S. Shrivastava; S. Nicolic; S. Tanaka; C. Ravishankar; D. Gaitonde et al.

2025. 33rd IEEE International Symposium on Field-Programmable Custom Computing Machines, Fayetteville, Arkansas, USA, 2025-05-04 - 2025-05-07. p. 143 - 151. DOI : 10.1109/FCCM62733.2025.00060.

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2024

Parallel FPGA Routing with On-the-Fly Net Decomposition

F. Kos; M. Stojilovic; V. Betz

2024. The 23rd International Conference on Field-Programmable Technology, Sydney, Australia, 2024-12-10 - 2024-12-12. p. 1 - 9. DOI : 10.1109/ICFPT64416.2024.11113423.

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MultiQueue-Based FPGA Routing: Relaxed A* Priority Ordering for Improved Parallelism

A. Singer; H. Yan; G. Zhang; M. Jeffrey; M. Stojilovic et al.

2024. The 23rd International Conference on Field-Programmable Technology, Sydney, Australia, 2024-12-10 - 2024-12-12. p. 1 - 9. DOI : 10.1109/ICFPT64416.2024.11113444.

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2023

GRAMM: Fast CGRA Application Mapping Based on A Heuristic for Finding Graph Minors

G. Zhou; M. Stojilovic; J. H. Anderson

2023. 33rd International Conference on Field-Programmable Logic and Applications (FPL), Gothenburg, SWEDEN, SEP 04-08, 2023. p. 305 - 310. DOI : 10.1109/FPL60245.2023.00052.

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IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck

S. Shrivastava; S. Nikolic; C. Ravishankar; D. Gaitonde; M. Stojilovic

2023. IEEE/ACM International Conference on Computer-Aided Design (IEEE/ACM ICCAD 2023), San Francisco, CA, USA, 2023-10-29 - 2023-11-02. DOI : 10.1109/ICCAD57390.2023.10323897.

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Temperature Impact on Remote Power Side-Channel Attacks on Shared FPGAs

O. Glamocanin; H. Bazaz; M. Payer; M. Stojilovic

2023. Design, Automation and Test in Europe Conference DATE 2023, Antwerp, Belgium, April 17-19, 2023. DOI : 10.23919/DATE56975.2023.10136979.

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Accuracy Boosters: Epoch-Driven Mixed-Mantissa Block Floating-Point for DNN Training

S. B. Harma; C. Sönmez; B. Falsafi; M. Jaggi; Y. Oh

2023. 11th International Conference on Learning Representations (ICLR 2023), Kigali, Rwanda, 2023-05-01 - 2023-05-05.

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Active Wire Fences for Multitenant FPGAs

O. Glamocanin; A. Kostic; S. Kostic; M. Stojilovic

2023. 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Tallinn, Estonia, May 3-5, 2023. p. 13 - 20. DOI : 10.1109/DDECS57882.2023.10138941.

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SecureCells: A Secure Compartmentalized Architecture

A. Bhattacharyya; F. Hofhammer; Y. Li; S. Gupta; A. Sánchez Marín et al.

2023. 44th IEEE Symposium on Security and Privacy, San Francisco, USA, May 22-24, 2023. p. 2921 - 2939. DOI : 10.1109/SP46215.2023.00125.

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Imprecise Store Exceptions

S. Gupta; Y. Li; Q. Kang; A. Bhattacharjee; B. Falsafi et al.

2023. The 50th Annual International Symposium on Computer Architecture (ISCA ’23), Orlando, FL, USA, June 17–21, 2023. DOI : 10.1145/3579371.3589087.

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Cooperative Concurrency Control for Write-Intensive Key-Value Workloads

M. J. Sutherland; B. Falsafi; A. Daglis

2023. The 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'23), Vancouver, BC, Canada, March 25–29, 2023. p. 30 - 46. DOI : 10.1145/3567955.3567957.

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2022

A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

H. Fendri; M. Macchetti; J. Perrine; M. Stojilovic

2022. 25th Design, Automation and Test in Europe Conference and Exhibition (DATE), Antwerp, Belgium [Virtual], March 14-23, 2022. p. 670 - 675. DOI : 10.23919/DATE54114.2022.9774531.

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FPGA-to-CPU Undervolting Attacks

D. G. A. S. Mahmoud; S. Hussein; V. Lenders; M. Stojilovic

2022. 25th Design, Automation and Test in Europe, Antwerp, Belgium [Virtual], March 14-23, 2022. p. 999 - 1004. DOI : 10.23919/DATE54114.2022.9774663.

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Deep Learning Detection of GPS Spoofing

O. Jullian; B. Otero; M. Stojilović; J. J. Costa; J. Verdú et al.

2022. 7th International Conference Machine Learning, Optimization, and Data Science (LOD 2021), Grasmere, UK, October 4-8, 2021. p. 527 - 540. DOI : 10.1007/978-3-030-95467-3_38.

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2021

Cerebros: Evading the RPC Tax in Datacenters

A. Pourhabibi Zarandi; M. J. Sutherland; A. Daglis; B. Falsafi

2021. MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18–22, 2021. p. 407 - 420. DOI : 10.1145/3466752.3480055.

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Equinox: Training (for Free) on a Custom Inference Accelerator

M. P. Drumond Lages De Oliveira; L. Coulon; A. Pourhabibi Zarandi; A. C. Yüzügüler; B. Falsafi et al.

2021. 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO’21), Virtual Event, Greece, October 18–22, 2021. DOI : 10.1145/3466752.3480057.

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Runtime Replacement of Machine Learning Modules in Fpga-based Systems

D. G. Mahmoud; B. Shokry; A. ElRefaey; H. H. Amer; I. Adly

2021. 10th Mediterranean Conference on Embedded Computing, Budva, Montenegro, 2021-06-07 - 2021-06-10. p. 340 - 343. DOI : 10.1109/MECO52532.2021.9460192.

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Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks

O. Glamocanin; D. Mahmoud; F. Regazzoni; M. Stojilovic

2021. DATE 2021 Design, Automation and Test in Europe, Virtual, February 1-5, 2021. p. 1645 - 1650. DOI : 10.23919/DATE51398.2021.9473947.

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Improving First-Order Threshold Implementations of SKINNY

A. F. Caforio; D. P. Collins; S. Banik; O. Glamocanin

2021. 22nd International Conference on Cryptology in India (INDOCRYPT21), Remote, December 12-15, 2021. p. 246 - 267. DOI : 10.1007/978-3-030-92518-5_1.

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Rebooting Virtual Memory with Midgard

S. Gupta; A. Bhattacharyya; Y. Oh; A. Bhattacharjee; B. Falsafi et al.

2021. ISCA 2021 48th International Symposium on Computer Architecture, Online conference, June 14-19, 2021. DOI : 10.1109/ISCA52012.2021.00047.

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2020

Nonintrusive and Adaptive Monitoring for Locating Voltage Attacks in Virtualized FPGAs

S. S. Mirzargar; G. Renault; A. Guerrieri; M. Stojilovic

2020. 19th International Conference on Field-Programmable Technology (ICFPT), Maui, HI, USA (Virtual conference), December 7-11, 2020. p. 288 - 289. DOI : 10.1109/ICFPT51103.2020.00050.

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Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?

O. Glamocanin; L. Coulon; F. Regazzoni; M. Stojilovic

2020. Design, Automation and Test in Europe (DATE), Grenoble, France, March 9-13, 2020. p. 1007 - 1010. DOI : 10.23919/DATE48585.2020.9116481.

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A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer

F. Gessler; P. Brisk; M. Stojilovic

2020. 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems (VLSID), Bangalore, India, January 4-8, 2020. DOI : 10.1109/VLSID49098.2020.00031.

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X-Attack: Remote Activation of Satisfiability Don’t-Care Hardware Trojans on Shared FPGAs

D. Mahmoud; W. Hu; M. Stojilovic

2020. 30th International Conference on Field-Programmable Logic and Applications (FPL), ELECTR NETWORK, August 31 - September 4, 2020. p. 185 - 192. DOI : 10.1109/FPL50879.2020.00039.

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Optimus Prime: Accelerating Data Transformation in Servers

A. Pourhabibi Zarandi; S. Gupta; H. Kassir; M. J. Sutherland; Z. Tian et al.

2020. Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, March 16–20, 2020. p. 1203 - 1216. DOI : 10.1145/3373376.3378501.

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The NEBULA RPC-Optimized Architecture

M. Sutherland; S. Gupta; B. Falsafi; V. Marathe; D. Pnevmatikatos et al.

2020. 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), Valencia, Spain, May, 30th - June, 3rd 2020. p. 199 - 212. DOI : 10.1109/ISCA45697.2020.00027.

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2019

A machine learning approach for power gating the FPGA routing network

S. Zeinab; H. Asadi; M. Stojilovic

2019. 2019 International Conference on Field-Programmable Technology (ICFPT), Tianjin, China, December 9-13, 2019. p. 10 - 18. DOI : 10.1109/ICFPT47387.2019.00010.

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Distributed Logless Atomic Durability with Persistent Memory

S. Gupta; A. Daglis; B. Falsafi

2019. The 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-52), Columbus, OH, USA, October 12–16, 2019. DOI : 10.1145/3352460.3358321.

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Physical Side-Channel Attacks and Covert Communication on FPGAs: A Survey

S. S. Mirzargar; M. Stojilovic

2019. 29th International Conference on Field Programmable Logic and Applications (FPL), Barcelona, Spain, September 9 - 13, 2019. DOI : 10.1109/FPL.2019.00039.

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FPGA-Assisted Deterministic Routing for FPGAs

D. Korolija; M. Stojilovic

2019. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Rio de Janeiro, Brasil, May 20-24, 2019. p. 155 - 162. DOI : 10.1109/IPDPSW.2019.00034.

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RPCValet: NI-Driven Tail-Aware Balancing of µs-Scale RPCs

A. Daglis; M. Sutherland; B. Falsafi

2019. Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS '19, Providence, Rhode Island, USA, April 13-17, 2019. p. 35 - 48. DOI : 10.1145/3297858.3304070.

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Timing Violation Induced Faults in Multi-Tenant FPGAs

D. Mahmoud; M. Stojilovic

2019. Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, ITALY, Mar 25-29, 2019. p. 1745 - 1750. DOI : 10.23919/DATE.2019.8715263.

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Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores

A. Margaritov; S. Gupta; R. Gonzalez-Alberquilla; B. Grot

2019. 25th IEEE International Symposium on High Performance Computer Architecture (HPCA), Washington, DC, Feb 16-20, 2019. p. 15 - 27. DOI : 10.1109/HPCA.2019.00024.

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Linebacker: Preserving Victim Cache Lines in Idle Register Files of GPUs

Y. Oh; G. Koo; M. Annavaram; W. W. Ro

2019. 46th International Symposium on Computer Architecture (ISCA), Phoenix, AZ, Jun 22-26, 2019. p. 183 - 196. DOI : 10.1145/3307650.3322222.

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SMoTherSpectre: Exploiting Speculative Execution through Port Contention

A. Bhattacharyya; A. Sandulescu; M. Neugschwandtner; A. Sorniotti; B. Falsafi et al.

2019. The 26th ACM Conference on Computer and Communications Security - ACM CSS 2019, London, UK, November 11-15, 2019. p. 785 - 800. DOI : 10.1145/3319535.3363194.

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2018

Design Guidelines for High-Performance SCM Hierarchies

D. Ustiugov; A. Daglis; J. Picorel Obando; M. J. Sutherland; E. Bugnion et al.

2018. 4th International Symposium on Memory Systems (MEMSYS), Old Town Alexandria, VA, USA, October 1-4, 2018. DOI : 10.1145/3240302.3240310.

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Training DNNs with Hybrid Block Floating Point

M. Drumond; T. Lin; M. Jaggi; B. Falsafi

2018. NeurIPS 2018 - 32nd Conference on Neural Information Processing Systems, Montreal, CANADA, Dec 02-08, 2018.

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Deterministic Parallel Routing for FPGAs based on Galois Parallel Execution Model

Y. Moctar; M. Stojilovic; P. Brisk

2018. 28th International Conference on Field Programmable Logic and Applications (FPL), Dublin, IRELAND, Aug 26-31, 2018. p. 21 - 25. DOI : 10.1109/FPL.2018.00011.

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Towards Commoditizing Simulations of System Models Using Recurrent Neural Networks

A. C. Yuzuguler; A. Moga; C. Franke

2018. IEEE International Conference on Communications, Control, and Computing Technologies for Smart Grids (SmartGridComm), Aalborg, DENMARK, Oct 29-31, 2018. DOI : 10.1109/SmartGridComm.2018.8587599.

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LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching

M. Sadrosadati; A. Mirhosseini; S. B. Ehsani; H. Sarbazi-Azad; M. Drumond et al.

2018. Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS '18, Williamsburg, VA, USA, March 24th – March 28th, 2018. p. 489 - 502. DOI : 10.1145/3173162.3173211.

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2017

The Mondrian Data Engine

M. P. Drumond Lages De Oliveira; A. Daglis; N. Mirzadeh; D. Ustiugov; J. Picorel Obando et al.

2017. The 44th International Symposium on Computer Architecture, Toronto, ON, Canada, June 24-28, 2017. DOI : 10.1145/3079856.3080233.

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Near-Memory Address Translation

J. Picorel; D. Jevdjic; B. Falsafi

2017. 26th International Conference on Parallel Architectures and Compilation Techniques (PACT), Portland, OR, SEP 09-13, 2017. p. 303 - 317. DOI : 10.1109/Pact.2017.56.

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Parallel FPGA routing: Survey and challenges

M. Stojilovic

2017. 2017 27th International Conference on Field Programmable Logic and Applications (FPL), Ghent, Belgium, September 4-8, 2017. p. 1 - 8. DOI : 10.23919/FPL.2017.8056782.

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2016

SABRes: Atomic Object Reads for In-Memory Rack-Scale Computing

A. Daglis; D. Ustiugov; S. Novakovic; E. Bugnion; B. Falsafi et al.

2016. 49th Annual IEEE/ACM International Symposium on Microarchitecture, Taipei, Taiwan, October 15-19, 2016. DOI : 10.1109/MICRO.2016.7783709.

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An Analysis of Load Imbalance in Scale-out Data Serving

S. Novakovic; A. Daglis; E. Bugnion; B. Falsafi; B. Grot

2016. ACM SIGMETRICS, Antibes Juan-Les-Pins, France, June 14-18, 2016. p. 367 - 368. DOI : 10.1145/2896377.2901501.

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Unlocking Energy

B. Falsafi; R. Guerraoui; J. Picorel Obando; V. Trigonakis

2016. 2016 USENIX Annual Technical Conference, Denver, Colorado, USA, June 22-24, 2016. p. 393 - 406.

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The Case for RackOut: Scalable Data Serving Using Rack-Scale Systems

S. Novakovic; A. Daglis; E. Bugnion; B. Falsafi; B. Grot

2016. ACM Symposium on Cloud Computing, Santa Clara, USA, October 05-07, 2016. DOI : 10.1145/2987550.2987577.

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Towards Near-Threshold Server Processors

A. Pahlevan; J. Picorel Obando; A. Pourhabibi Zarandi; D. Rossi; M. Zapater Sancho et al.

2016. Design, Automation and Test in Europe Conference (DATE '16), Dresden, Germany, March 14-18, 2016. p. 7 - 12.

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2015

Confluence: unified instruction supply for scale-out servers

C. Kaynak; B. Grot; B. Falsafi

2015. the 48th International Symposium, Waikiki, Hawaii, 05-09 December 2015. p. 166 - 177. DOI : 10.1145/2830772.2830785.

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Manycore Network Interfaces for In-Memory Rack-Scale Computing

A. Daglis; S. Novakovic; E. Bugnion; B. Falsafi; B. Grot

2015. 42nd International Symposium in Computer Architecture, Portland, Oregon, USA, June 13-17, 2015. DOI : 10.1145/2749469.2750415.

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Sort vs. Hash Join Revisited for Near-Memory Execution

N. Mirzadeh; O. Kocberber; B. Falsafi; B. Grot

2015. 5th Workshop on Architectures and Systems for Big Data (ASBD 2015), Portland, Oregon, USA, June 13, 2015.

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2014

BuMP: Bulk Memory Access Prediction and Streaming

S. Volos; J. Picorel; B. Falsafi; B. Grot

2014. 47th Annual IEEE/ACM International Symposium on Microarchitecture, December 13-17, 2014. p. 545 - 557. DOI : 10.1109/MICRO.2014.44.

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FADE: A Programmable Filtering Accelerator for Instruction-Grain Monitoring

S. Fytraki; E. Vlachos; O. Kocberber; B. Falsafi; B. Grot

2014. 20th IEEE International Symposium On High Performance Computer Architecture (HPCA-2014), Orlando, Florida, USA, February 15-19, 2014. p. 108 - 119. DOI : 10.1109/HPCA.2014.6835922.

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Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache

D. Jevdjic; G. H. Loh; C. Kaynak; B. Falsafi

2014. 47th Annual IEEE/ACM International Symposium on Microarchitecture, Cambridge, UK, December 13-17, 2014. p. 25 - 37. DOI : 10.1109/MICRO.2014.51.

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Scale-Out NUMA

S. Novakovic; A. Daglis; E. Bugnion; B. Falsafi; B. Grot

2014. Nineteenth International Conference on Architectural Support for Programming Languages and Operating Systems, Salt Lake City, Utah, USA, March 1-5, 2014. DOI : 10.1145/2541940.2541965.

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2013

Die-Stacked DRAM Caches for Servers: Hit Ratio, Latency, or Bandwidth? Have It All with Footprint Cache

D. Jevdjic; S. Volos; B. Falsafi

2013. 40th International Symposium on Computer Architecture, Tel-Aviv, Israel, June 23-27, 2013. p. 404 - 415. DOI : 10.1145/2485922.2485957.

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SHIFT: Shared History Instruction Fetch for Lean-Core Server Processors

C. Kaynak; B. Grot; B. Falsafi

2013. 46th Annual IEEE/ACM International Symposium on Microarchitecture, Davis, CA, USA, December 7-11, 2013. DOI : 10.1145/2540708.2540732.

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From A to E: Analyzing TPC’s OLTP Benchmarks -- The obsolete, the ubiquitous, the unexplored

P. Tözün; I. Pandis; I. C. Kaynak; D. Jevdic; A. Ailamaki

2013. 16th International Conference on Extending Database Technology, Genoa, Italy, March 18-22, 2013. p. 17 - 28. DOI : 10.1145/2452376.2452380.

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Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

O. Kocberber; B. Grot; J. Picorel; B. Falsafi; K. Lim et al.

2013. 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'13), Davis, CA, USA, December 7-11, 2013. DOI : 10.1145/2540708.2540748.

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Multi-Grain Coherence Directory

J. Zebchuk; B. Falsafi; A. Moshovos

2013. 46th Annual IEEE/ACM International Symposium on Microarchitecture, Davis, CA, USA, December 7-11, 2013. DOI : 10.1145/2540708.2540739.

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2012

CCNoC: Specializing On-Chip Interconnects for Energy Efficiency in Cache-Coherent Servers

S. Volos; C. Seiculescu; B. Grot; N. Khosro Pour; B. Falsafi et al.

2012. 6th International Symposium on Networks-on-Chip, Lyngby, Denmark, May 9-11, 2012.

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NOC-Out: Microarchitecting a Scale-Out Processor

P. Lotfi-Kamran; B. Grot; B. Falsafi

2012. 45th International Symposium on Microarchitecture, Vancouver, BC, Canada, December 1-5, 2012. DOI : 10.1109/MICRO.2012.25.

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Dark Silicon Accelerators for Database Indexing

O. Kocberber; B. Falsafi; K. Lim; P. Ranganathan; S. Harizopoulos

2012. 1st Dark Silicon Workshop, Portland, Oregon, USA, June 10, 2012.

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Clearing the Clouds: A Study of Emerging Scale-out Workloads on Modern Hardware

M. Ferdman; A. Adileh; O. Kocberber; S. Volos; M. Alisafaee et al.

2012. Seventeenth International Conference on Architectural Support for Programming Languages and Operating Systems, London, UK, March 3-7, 2012. DOI : 10.1145/2150976.2150982.

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Thermal Characterization of Cloud Workloads on a Power-Efficient Server-on-Chip

D. Milojevic; S. Idgunji; D. Jevdjic; E. Ozer; P. Lotfi-Kamran et al.

2012. 30th IEEE International Conference on Computer Design, Montreal, Quebec, Canada, September 30 - October 3, 2012. DOI : 10.1109/ICCD.2012.6378637.

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Scale-Out Processors

P. Lotfi-Kamran; B. Grot; M. Ferdman; S. Volos; O. Kocberber et al.

2012. 39th Annual International Symposium on Computer Architecture, Portland, Oregon, USA, June 9-13, 2012. DOI : 10.1145/2366231.2337217.

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2011

Proactive Instruction Fetch

M. Ferdman; C. Kaynak; B. Falsafi

2011. 44th Annual IEEE/ACM Symposium on Microarchitecture (MICRO 2011), Porto Alegre, Brazil, December 3-7. p. 152 - 162. DOI : 10.1145/2155620.2155638.

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Reliability in the Dark Silicon Era

B. Falsafi

2011. 17th IEEE International On-Line Testing Symposium (IOLTS), Athens, Greece, Jul 13-15, 2011. p. V - V.

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CCNoC: On-Chip Interconnects for Cache-Coherent Manycore Server Chips

C. Seiculescu; S. Volos; N. Khosro Pour; B. Falsafi; G. De Micheli

2011. Workshop on Energy-Efficient Design (WEED 2011), San Jose, California, USA, June 5, 2011.

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Cuckoo Directory: A Scalable Directory for Many-Core Systems

M. Ferdman; P. Lotfi-Kamran; K. Balet; B. Falsafi

2011. HPCA 2011, San Antonio, Texas, USA, February 12-16, 2011. DOI : 10.1109/HPCA.2011.5749726.

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2010

The Path Forward: Specialized Computing in the Datacenter

N. Hardavellas; M. Ferdman; A. Ailamaki; B. Falsafi

2010. 5th Workshop on Cutting-Edge Research in Networking.

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ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications

E. Vlachos; M. L. Goodstein; M. A. Kozuch; S. Chen; B. Falsafi et al.

2010. ASPLOS 2010, Pittsburgh, Pennsylvania, USA, March 13-17, 2010. p. 271 - 284. DOI : 10.1145/1736020.1736051.

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TurboTag: Lookup Filtering to Reduce Coherence Directory Power

P. Lotfi-Kamran; M. Ferdman; D. Crisan; B. Falsafi

2010. 16th International Symposium on Low Power Electronics and Design (ISLPED 10), Austin, Texas, USA, August 18-20. p. 377 - 382. DOI : 10.1145/1840845.1840929.

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2009

Spatio-Temporal Memory Streaming

S. Somogyi; T. F. Wenisch; A. Ailamaki; B. Falsafi

2009. 36th ACM/IEEE Annual International Symposium on Computer Architecture, Austin, TX. p. 69 - 80. DOI : 10.1145/1555754.1555766.

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Reactive NUCA: Near-Optimal Block Placement and Replication in Distributed Caches

N. Hardavellas; M. Ferdman; B. Falsafi; A. Ailamaki

2009. 36th ACM/IEEE Annual International Symposium on Computer Architecture, Austin, TX. p. 184 - 195. DOI : 10.1145/1555754.1555779.

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Chip-Level Redundancy in Distributed Shared-Memory Multiprocessors

B. T. Gold; B. Falsafi; J. C. Hoe

2009. p. 195 - 201. DOI : 10.1109/PRDC.2009.39.

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Practical Off-chip Meta-data for Temporal Memory Streaming

T. F. Wenisch; M. Ferdman; A. Ailamaki; B. Falsafi; A. Moshovos

2009. 15th International Symposium on High-Performance Computer Architecture, Raleigh, NC. p. 79 - 90. DOI : 10.1109/HPCA.2009.4798239.

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ReSim, a Trace-Driven, Reconfigurable ILP Processor Simulator

S. Fytraki; D. Pnevmatikatos

2009. DATE 2009, Nice, France, April 20-24, 2009. p. 536 - 541. DOI : 10.1109/DATE.2009.5090722.

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2008

Temporal streams in commercial server applications

T. F. Wenisch; M. Ferdman; A. Ailamaki; B. Falsafi; A. Moshovos

2008. IEEE International Symposium on Workload Characterization (IISWC), Seattle, WA, September. p. 99 - 108. DOI : 10.1109/IISWC.2008.4636095.

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Temporal instruction fetch streaming

M. Ferdman; T. F. Wenisch; A. Ailamaki; B. Falsafi; A. Moshovos

2008. the 41st annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Lake Como, Italy, November. p. 1 - 10. DOI : 10.1109/MICRO.2008.4771774.

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BARP-A Dynamic Routing Protocol for Balanced Distribution of Traffic in NoCs to Avoid Congestion

P. Lotfi-Kamran; M. Daneshtalab; C. Lucas; Z. Navabi

2008. Design, Automation and Test in Europe, 2008. DATE '08, Munich, March 10-14, 2008. p. 1408 - 1413. DOI : 10.1109/DATE.2008.4484871.

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A Complexity-Effective Architecture for Accelerating Full-System Multiprocessor Simulations Using FPGAs

E. S. Chung; E. Nurvitadhi; J. C. Hoe; B. Falsafi; K. Mai

2008. 16th international ACM/SIGDA symposium on Field programmable gate arrays (FPGA), Monterey, CA, February. p. 77 - 86. DOI : 10.1145/1344671.1344684.

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Stall Power Reduction in Pipelined Architecture Processors

P. Lotfi-Kamran; A.-M. Rahmani; A.-A. Salehpour; A. Afzali-Kusha; Z. Navabi

2008. 21st International Conference on VLSI Design, Hyderabad, January 4-8, 2008. p. 541 - 546. DOI : 10.1109/VLSI.2008.34.

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A Rate-based Prefiltering Approach to BLAST Acceleration

P. Afratis; E. Sotiriades; G. Chrysos; S. Fytraki; D. Pnevmatikatos

2008. International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, September 08-10, 2008. p. 631 - 634. DOI : 10.1109/FPL.2008.4630026.

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Flexible hardware acceleration for instruction-grain program monitoring

S. Chen; M. Kozuch; T. Strigkos; B. Falsafi; P. B. Gibbons et al.

2008. the 35th Annual International Symposium on Computer Architecture (ISCA), Beijing, China, June. p. 377 - 388. DOI : 10.1109/ISCA.2008.20.

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Predictor virtualization

I. Burcea; S. Somogyi; A. Moshovos; B. Falsafi

2008. the 13th international conference on Architectural support for programming languages and operating systems (ASPLOS), Seattle, WA, March. p. 157 - 167. DOI : 10.1145/1346281.1346301.

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