2024

Parallel FPGA Routing with On-the-Fly Net Decomposition

F. KosM. StojilovicV. Betz

2024. The 23rd International Conference on Field-Programmable Technology, Sydney, Australia, 2024-12-10 - 2024-12-12.

MultiQueue-Based FPGA Routing: Relaxed A* Priority Ordering for Improved Parallelism

A. SingerH. YanG. ZhangM. JeffreyM. Stojilovic  et al.

2024. The 23rd International Conference on Field-Programmable Technology, Sydney, Australia, 2024-12-10 - 2024-12-12.

UrbanTwin: An urban digital twin for climate action

D.-A. ConstantinescuV. KartschY. NakatsukaP. WieseP. Orbanovik  et al.

EcoCloud Annual Event on IT Sustainability 2024, Lausanne, Switzerland, 2024-10-08.

Electrical-Level Fault-Injection Attacks on FPGA-Based Systems

D. G. A. S. Mahmoud / B. FalsafiM. Stojilovic (Dir.)

Lausanne, EPFL, 2024. p. 227. DOI : 10.5075/epfl-thesis-10315.

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs

D. G. MahmoudB. ShokryV. LendersW. HuM. Stojilović

IEEE Access. 2024. p. 1 - 1. DOI : 10.1109/ACCESS.2024.3353134.

2023

Practical Implementations of Remote Power Side-Channel and Fault-Injection Attacks on Multitenant FPGAs

D. G. MahmoudO. GlamočaninF. RegazzoniM. Stojilović

Security of FPGA-Accelerated Cloud Computing Environments; Springer, Cham, 2023. p. 101 - 135. - 978-3-031-45394-6.

DOI : 10.1007/978-3-031-45395-3_5.

GRAMM: Fast CGRA Application Mapping Based on A Heuristic for Finding Graph Minors

G. ZhouM. StojilovicJ. H. Anderson

2023. 33rd International Conference on Field-Programmable Logic and Applications (FPL), Gothenburg, SWEDEN, SEP 04-08, 2023. p. 305 - 310. DOI : 10.1109/FPL60245.2023.00052.

IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck

S. ShrivastavaS. NikolicC. RavishankarD. GaitondeM. Stojilovic

2023. IEEE/ACM International Conference on Computer-Aided Design (IEEE/ACM ICCAD 2023), San Francisco, CA, USA, October 29 - November 2, 2023. DOI : 10.1109/ICCAD57390.2023.10323897.

What's Missing in Agile Hardware Design? Verification!

B. Falsafi

Journal Of Computer Science And Technology. 2023. Vol. 38, num. 4, p. 735 - 736. DOI : 10.1007/s11390-023-0005-3.

Scale-out Systolic Arrays

A. C. YuzugulerC. SonmezM. DrumondY. OhB. Falsafi  et al.

Acm Transactions On Architecture And Code Optimization. 2023. Vol. 20, num. 2, p. 27. DOI : 10.1145/3572917.

Temperature Impact on Remote Power Side-Channel Attacks on Shared FPGAs

O. GlamocaninH. BazazM. PayerM. Stojilovic

2023. Design, Automation and Test in Europe Conference DATE 2023, Antwerp, Belgium, April 17-19, 2023. DOI : 10.23919/DATE56975.2023.10136979.

The Side-channel Metrics Cheat Sheet

K. PapagiannopoulosO. GlamočaninM. AzouaouiD. RosF. Regazzoni  et al.

ACM Computing Surveys. 2023. Vol. 55, num. 10, p. 1 - 38. DOI : 10.1145/3565571.

AstriFlash: A Flash-Based System for Online Services

S. GuptaY. OhL. YanM. J. SutherlandA. Bhattacharjee  et al.

2023. The 29th IEEE International Symposium on High-Performance Computer Architecture (HPCA-29), Montreal, QC, Canada, Feb 25 – March 01, 2023. DOI : 10.1109/HPCA56546.2023.10070955.

Rebooting Virtual Memory with Midgard

S. Gupta / B. FalsafiA. Bhattacharjee (Dir.)

Lausanne, EPFL, 2023. p. 178. DOI : 10.5075/epfl-thesis-8864.

Cooperative Concurrency Control for Write-Intensive Key-Value Workloads

M. J. SutherlandB. FalsafiA. Daglis

2023. The 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'23), Vancouver, BC, Canada, March 25–29, 2023. p. 30 - 46. DOI : 10.1145/3567955.3567957.

RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

D. SpielmannO. GlamočaninM. Stojilović

IACR Transactions on Cryptographic Hardware and Embedded Systems. 2023. Vol. 2023, num. 2, p. 543 - 567. DOI : 10.46586/tches.v2023.i2.543-567.

Active Wire Fences for Multitenant FPGAs

O. GlamocaninA. KosticS. KosticM. Stojilovic

2023. 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Tallinn, Estonia, May 3-5, 2023. p. 13 - 20. DOI : 10.1109/DDECS57882.2023.10138941.

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

O. Glamocanin / B. FalsafiM. Stojilovic (Dir.)

Lausanne, EPFL, 2023. p. 249. DOI : 10.5075/epfl-thesis-9918.

IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck

S. ShrivastavaS. NikolicC. RavishankarD. GaitondeM. Stojilovic

2023.

A Visionary Look at the Security of Reconfigurable Cloud Computing

M. StojilovićK. RasmussenF. RegazzoniM. B. TahooriR. Tessier

Proceedings of the IEEE. 2023. p. 1 - 24. DOI : 10.1109/JPROC.2023.3330729.

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

O. GlamočaninS. ShrivastavaJ. YaoN. ArdoM. Payer  et al.

Journal of Hardware and Systems Security. 2023. DOI : 10.1007/s41635-023-00135-1.

Imprecise Store Exceptions

S. GuptaY. LiQ. KangA. BhattacharjeeB. Falsafi  et al.

2023. The 50th Annual International Symposium on Computer Architecture (ISCA ’23), Orlando, FL, USA, June 17–21, 2023. DOI : 10.1145/3579371.3589087.

SecureCells: A Secure Compartmentalized Architecture

A. BhattacharyyaF. HofhammerY. LiS. GuptaA. Sánchez Marín  et al.

2023. 44th IEEE Symposium on Security and Privacy, San Francisco, USA, May 22-24, 2023. p. 2921 - 2939. DOI : 10.1109/SP46215.2023.00125.

2022

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

D. G. A. S. MahmoudD. DervishiS. HusseinV. LendersM. Stojilovic

IEEE Access. 2022. Vol. 10, p. 134199 - 134216. DOI : 10.1109/ACCESS.2022.3231753.

A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

H. FendriM. MacchettiJ. PerrineM. Stojilovic

2022. 25th Design, Automation and Test in Europe Conference and Exhibition (DATE), Antwerp, Belgium [Virtual], March 14-23, 2022. p. 670 - 675. DOI : 10.23919/DATE54114.2022.9774531.

FPGA-to-CPU Undervolting Attacks

D. G. A. S. MahmoudS. HusseinV. LendersM. Stojilovic

2022. 25th Design, Automation and Test in Europe, Antwerp, Belgium [Virtual], March 14-23, 2022. p. 999 - 1004. DOI : 10.23919/DATE54114.2022.9774663.

Electrical-Level Attacks on CPUs, FPGAs, and GPUs: Survey and Implications in the Heterogeneous Era

D. G. MahmoudV. LendersM. Stojilović

ACM Computing Surveys. 2022. Vol. 55, num. 3, p. 1 - 40. DOI : 10.1145/3498337.

Deep Learning Detection of GPS Spoofing

O. JullianB. OteroM. StojilovićJ. J. CostaJ. Verdú  et al.

2022. 7th International Conference Machine Learning, Optimization, and Data Science (LOD 2021), Grasmere, UK, October 4-8, 2021. p. 527 - 540. DOI : 10.1007/978-3-030-95467-3_38.

Hardware and Software Support for RPC-Centric Server Architecture

M. J. Sutherland / B. FalsafiA. Daglis (Dir.)

Lausanne, EPFL, 2022. p. 256. DOI : 10.5075/epfl-thesis-8017.

2021

Cerebros: Evading the RPC Tax in Datacenters

A. Pourhabibi ZarandiM. J. SutherlandA. DaglisB. Falsafi

2021. MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18–22, 2021. p. 407 - 420. DOI : 10.1145/3466752.3480055.

Equinox: Training (for Free) on a Custom Inference Accelerator

M. P. Drumond Lages De OliveiraL. CoulonA. Pourhabibi ZarandiA. C. YüzügülerB. Falsafi  et al.

2021. 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO’21), Virtual Event, Greece, October 18–22, 2021. DOI : 10.1145/3466752.3480057.

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs

M. B. PetersenS. NikolicM. Stojilovic

2021. International Symposium on Field-Programmable Gate Arrays, Virtual Conference, February 28 - March 2, 2021. DOI : 10.1145/3431920.3439285.

Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks

O. GlamocaninD. MahmoudF. RegazzoniM. Stojilovic

2021. DATE 2021 Design, Automation and Test in Europe, Virtual, February 1-5, 2021. p. 1645 - 1650. DOI : 10.23919/DATE51398.2021.9473947.

Hardware-Software Co-Design of an RPC Processor

A. Pourhabibi Zarandi / B. Falsafi (Dir.)

Lausanne, EPFL, 2021. p. 146. DOI : 10.5075/epfl-thesis-7217.

Data transformer apparatus

A. Pourhabibi ZarandiS. GuptaH. KassirM. SutherlandZ. Tian  et al.

US11748254 ; US2022327048 ; WO2021037341 . 2021.

Improving First-Order Threshold Implementations of SKINNY

A. F. CaforioD. P. CollinsS. BanikO. Glamocanin

2021. 22nd International Conference on Cryptology in India (INDOCRYPT21), Remote, December 12-15, 2021. p. 246 - 267. DOI : 10.1007/978-3-030-92518-5_1.

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Z. SeifooriH. AsadiM. Stojilovic

IEEE Access. 2021. Vol. 9, p. 115599 - 115619. DOI : 10.1109/ACCESS.2021.3085005.

Rebooting Virtual Memory with Midgard

S. GuptaA. BhattacharyyaY. OhA. BhattacharjeeB. Falsafi  et al.

2021. ISCA 2021 48th International Symposium on Computer Architecture, Online conference, June 14-19, 2021. DOI : 10.1109/ISCA52012.2021.00047.

2020

Nonintrusive and Adaptive Monitoring for Locating Voltage Attacks in Virtualized FPGAs

S. S. MirzargarG. RenaultA. GuerrieriM. Stojilovic

2020. 19th International Conference on Field-Programmable Technology (ICFPT), Maui, HI, USA (Virtual conference), December 7-11, 2020. p. 288 - 289. DOI : 10.1109/ICFPT51103.2020.00050.

Exploiting Errors for Efficiency: A Survey from Circuits to Applications

P. Stanley-MarbellA. AlaghiM. CarbinE. DarulovaL. Dolecek  et al.

Acm Computing Surveys. 2020. Vol. 53, num. 3, p. 51. DOI : 10.1145/3394898.

Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?

O. GlamocaninL. CoulonF. RegazzoniM. Stojilovic

2020. Design, Automation and Test in Europe (DATE), Grenoble, France, March 9-13, 2020. p. 1007 - 1010. DOI : 10.23919/DATE48585.2020.9116481.

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks

Z. SeifooriS. S. MirzargarM. Stojilovic

2020. 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020), Seaside, California, USA, February 23-25, 2020. DOI : 10.1145/3373087.3375319.

Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs

O. GlamocaninL. CoulonF. RegazzoniM. Stojilovic

2020. 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020), Seaside, California, USA, February 23-25, 2020. DOI : 10.1145/3373087.3375318.

A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer

F. GesslerP. BriskM. Stojilovic

2020. 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems (VLSID), Bangalore, India, January 4-8, 2020. DOI : 10.1109/VLSID49098.2020.00031.

ColTraIn: Co-located DNN training and inference

M. P. Drumond Lages De Oliveira / B. FalsafiM. Jaggi (Dir.)

Lausanne, EPFL, 2020. p. 115. DOI : 10.5075/epfl-thesis-10265.

SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators

J. PicorelS. A. S. KohroudiZ. YanA. BhattacharjeeB. Falsafi  et al.

2020

Optimus Prime: Accelerating Data Transformation in Servers

A. Pourhabibi ZarandiS. GuptaH. KassirM. J. SutherlandZ. Tian  et al.

2020. Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, March 16–20, 2020. p. 1203 - 1216. DOI : 10.1145/3373376.3378501.

The NEBULA RPC-Optimized Architecture

M. SutherlandS. GuptaB. FalsafiV. MaratheD. Pnevmatikatos  et al.

2020. 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), Valencia, Spain, May, 30th - June, 3rd 2020. p. 199 - 212. DOI : 10.1109/ISCA45697.2020.00027.

X-Attack: Remote Activation of Satisfiability Don’t-Care Hardware Trojans on Shared FPGAs

D. MahmoudW. HuM. Stojilovic

2020. 30th International Conference on Field-Programmable Logic and Applications (FPL), ELECTR NETWORK, August 31 - September 4, 2020. p. 185 - 192. DOI : 10.1109/FPL50879.2020.00039.

2019

A machine learning approach for power gating the FPGA routing network

S. ZeinabH. AsadiM. Stojilovic

2019. 2019 International Conference on Field-Programmable Technology (ICFPT), Tianjin, China, December 9-13, 2019. p. 10 - 18. DOI : 10.1109/ICFPT47387.2019.00010.

Distributed Logless Atomic Durability with Persistent Memory

S. GuptaA. DaglisB. Falsafi

2019. The 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-52), Columbus, OH, USA, October 12–16, 2019. DOI : 10.1145/3352460.3358321.

Physical Side-Channel Attacks and Covert Communication on FPGAs: A Survey

S. S. MirzargarM. Stojilovic

2019. 29th International Conference on Field Programmable Logic and Applications (FPL), Barcelona, Spain, September 9 - 13, 2019. DOI : 10.1109/FPL.2019.00039.

FPGA-Assisted Deterministic Routing for FPGAs

D. KorolijaM. Stojilovic

2019. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Rio de Janeiro, Brasil, May 20-24, 2019. p. 155 - 162. DOI : 10.1109/IPDPSW.2019.00034.

RPCValet: NI-Driven Tail-Aware Balancing of µs-Scale RPCs

A. DaglisM. SutherlandB. Falsafi

2019. Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS '19, Providence, Rhode Island, USA, April 13-17, 2019. p. 35 - 48. DOI : 10.1145/3297858.3304070.

Mitigating Load Imbalance in Distributed Data Serving with Rack-Scale Memory Pooling

S. NovakovicA. DaglisD. UstiugovE. BugnionB. Falsafi  et al.

ACM Transactions on Computer Systems. 2019. Vol. 36, num. 2, p. 1 - 37. DOI : 10.1145/3309986.

Timing Violation Induced Faults in Multi-Tenant FPGAs

D. MahmoudM. Stojilovic

2019. Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, ITALY, Mar 25-29, 2019. p. 1745 - 1750. DOI : 10.23919/DATE.2019.8715263.

Analog Neural Networks with Deep-submicron Nonlinear Synapses

A. C. YüzügülerF. ÇelikM. P. Drumond Lages De OliveiraB. FalsafiP. Frossard

IEEE Micro. 2019. Vol. 39, num. 5, p. 55 - 63. DOI : 10.1109/MM.2019.2931182.

SMoTherSpectre: Exploiting Speculative Execution through Port Contention

A. BhattacharyyaA. SandulescuM. NeugschwandtnerA. SorniottiB. Falsafi  et al.

2019. The 26th ACM Conference on Computer and Communications Security - ACM CSS 2019, London, UK, November 11-15, 2019. p. 785 - 800. DOI : 10.1145/3319535.3363194.

Linebacker: Preserving Victim Cache Lines in Idle Register Files of GPUs

Y. OhG. KooM. AnnavaramW. W. Ro

2019. 46th International Symposium on Computer Architecture (ISCA), Phoenix, AZ, Jun 22-26, 2019. p. 183 - 196. DOI : 10.1145/3307650.3322222.

Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores

A. MargaritovS. GuptaR. Gonzalez-AlberquillaB. Grot

2019. 25th IEEE International Symposium on High Performance Computer Architecture (HPCA), Washington, DC, Feb 16-20, 2019. p. 15 - 27. DOI : 10.1109/HPCA.2019.00024.

2018

Design Guidelines for High-Performance SCM Hierarchies

D. UstiugovA. DaglisJ. Picorel ObandoM. J. SutherlandE. Bugnion  et al.

2018. 4th International Symposium on Memory Systems (MEMSYS), Old Town Alexandria, VA, USA, October 1-4, 2018. DOI : 10.1145/3240302.3240310.

Atomic object reads for in-memory rack-scale computing

A. DaglisB. R. GrotB. Falsafi

US10929174 ; US2018173673 . 2018.

LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching

M. SadrosadatiA. MirhosseiniS. B. EhsaniH. Sarbazi-AzadM. Drumond  et al.

2018. Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS '18, Williamsburg, VA, USA, March 24th – March 28th, 2018. p. 489 - 502. DOI : 10.1145/3173162.3173211.

Towards Commoditizing Simulations of System Models Using Recurrent Neural Networks

A. C. YuzugulerA. MogaC. Franke

2018. IEEE International Conference on Communications, Control, and Computing Technologies for Smart Grids (SmartGridComm), Aalborg, DENMARK, Oct 29-31, 2018. DOI : 10.1109/SmartGridComm.2018.8587599.

Training DNNs with Hybrid Block Floating Point

M. DrumondT. LinM. JaggiB. Falsafi

2018. NeurIPS 2018 - 32nd Conference on Neural Information Processing Systems, Montreal, CANADA, Dec 02-08, 2018.

Deterministic Parallel Routing for FPGAs based on Galois Parallel Execution Model

Y. MoctarM. StojilovicP. Brisk

2018. 28th International Conference on Field Programmable Logic and Applications (FPL), Dublin, IRELAND, Aug 26-31, 2018. p. 21 - 25. DOI : 10.1109/FPL.2018.00011.

Network-Compute Co-Design for Distributed In-Memory Computing

A. Daglis / B. FalsafiE. Bugnion (Dir.)

Lausanne, EPFL, 2018. p. 230. DOI : 10.5075/epfl-thesis-8749.

2017

Near-Memory Address Translation

J. Picorel Obando / B. Falsafi (Dir.)

Lausanne, EPFL, 2017. p. 134. DOI : 10.5075/epfl-thesis-7875.

Parallel FPGA routing: Survey and challenges

M. Stojilovic

2017. 2017 27th International Conference on Field Programmable Logic and Applications (FPL), Ghent, Belgium, September 4-8, 2017. p. 1 - 8. DOI : 10.23919/FPL.2017.8056782.

FPGAs versus GPUs in Data centers

B. FalsafiB. DallyD. SinghD. ChiouJ. J. Yi  et al.

IEEE Micro. 2017. Vol. 37, num. 1, p. 60 - 72. DOI : 10.1109/MM.2017.19.

The Mondrian Data Engine

M. P. Drumond Lages De OliveiraA. DaglisN. MirzadehD. UstiugovJ. Picorel Obando  et al.

2017. The 44th International Symposium on Computer Architecture, Toronto, ON, Canada, June 24-28, 2017. DOI : 10.1145/3079856.3080233.

Unified prefetching into instruction cache and branch target buffer

B. FalsafiI. C. KaynakB. R. Grot

US9996358 ; US2017090935 . 2017.

Fat Caches For Scale-Out Servers

S. VolosD. JevdjicB. FalsafiB. Grot

Ieee Micro. 2017. Vol. 37, num. 2, p. 90 - 103. DOI : 10.1109/MM.2017.32.

Near-Memory Address Translation

J. PicorelD. JevdjicB. Falsafi

2017. 26th International Conference on Parallel Architectures and Compilation Techniques (PACT), Portland, OR, SEP 09-13, 2017. p. 303 - 317. DOI : 10.1109/Pact.2017.56.

2016

A Cache-Assisted Scratchpad Memory for Multiple-Bit-Error Correction

H. FarbehN. S. MirzadehN. F. GhalatyS.-G. MiremadiM. Fazeli  et al.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2016. Vol. 24, num. 11, p. 3296 - 3309. DOI : 10.1109/TVLSI.2016.2544811.

Towards Near-Threshold Server Processors

A. PahlevanJ. Picorel ObandoA. Pourhabibi ZarandiD. RossiM. Zapater Sancho  et al.

2016. Design, Automation and Test in Europe Conference (DATE '16), Dresden, Germany, March 14-18, 2016. p. 7 - 12.

Near-Memory Data Services

B. FalsafiM. StanK. SkadronN. JayasenaY. Chen  et al.

IEEE Micro. 2016. Vol. 36, num. 1, p. 6 - 13. DOI : 10.1109/MM.2016.9.

Unlocking Energy

B. FalsafiR. GuerraouiJ. Picorel ObandoV. Trigonakis

2016. 2016 USENIX Annual Technical Conference, Denver, Colorado, USA, June 22-24, 2016. p. 393 - 406.

SABRes: Atomic Object Reads for In-Memory Rack-Scale Computing

A. DaglisD. UstiugovS. NovakovicE. BugnionB. Falsafi  et al.

2016. 49th Annual IEEE/ACM International Symposium on Microarchitecture, Taipei, Taiwan, October 15-19, 2016. DOI : 10.1109/MICRO.2016.7783709.

The Case for RackOut: Scalable Data Serving Using Rack-Scale Systems

S. NovakovicA. DaglisE. BugnionB. FalsafiB. Grot

2016. ACM Symposium on Cloud Computing, Santa Clara, USA, October 05-07, 2016. DOI : 10.1145/2987550.2987577.

An Analysis of Load Imbalance in Scale-out Data Serving

S. NovakovicA. DaglisE. BugnionB. FalsafiB. Grot

2016. ACM SIGMETRICS, Antibes Juan-Les-Pins, France, June 14-18, 2016. p. 367 - 368. DOI : 10.1145/2896377.2901501.

2015

Accelerators for Data Processing

Y. O. Koçberber / B. Falsafi (Dir.)

Lausanne, EPFL, 2015. p. 123. DOI : 10.5075/epfl-thesis-6710.

Memory Systems and Interconnects for Scale-Out Servers

S. Volos / B. Falsafi (Dir.)

Lausanne, EPFL, 2015. p. 134. DOI : 10.5075/epfl-thesis-6682.

Sort vs. Hash Join Revisited for Near-Memory Execution

N. MirzadehY. O. KoçberberB. FalsafiB. Grot

5th Workshop on Architectures and Systems for Big Data ( ASBD 2015 ), Portland, Oregon, USA, June 13, 2015.

Sort vs. Hash Join Revisited for Near-Memory Execution

N. MirzadehO. KocberberB. FalsafiB. Grot

2015. 5th Workshop on Architectures and Systems for Big Data (ASBD 2015), Portland, Oregon, USA, June 13, 2015.

Manycore Network Interfaces for In-Memory Rack-Scale Computing

A. DaglisS. NovakovicE. BugnionB. FalsafiB. Grot

2015. 42nd International Symposium in Computer Architecture, Portland, Oregon, USA, June 13-17, 2015. DOI : 10.1145/2749469.2750415.

Multi-Gigabyte On-Chip DRAM Caches for Servers

D. Jevdic / B. Falsafi (Dir.)

Lausanne, EPFL, 2015. p. 149. DOI : 10.5075/epfl-thesis-6631.

Asynchronous memory access chaining

O. KocberberB. FalsafiB. Grot

Proceedings of the VLDB Endowment. 2015. Vol. 9, num. 4, p. 252 - 263. DOI : 10.14778/2856318.2856321.

Confluence: unified instruction supply for scale-out servers

C. KaynakB. GrotB. Falsafi

2015. the 48th International Symposium, Waikiki, Hawaii, 05-09 December 2015. p. 166 - 177. DOI : 10.1145/2830772.2830785.

Shared Frontend for Manycore Server Processors

I. C. Kaynak / B. FalsafiB. R. Grot (Dir.)

Lausanne, EPFL, 2015. p. 134. DOI : 10.5075/epfl-thesis-6669.

2014

A Primer on Hardware Prefetching

B. FalsafiT. F. Wenisch

Morgan & Claypool.

DOI : 10.2200/S00581ED1V01Y201405CAC028.

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip

H. KimB. GrotP. V. GratzD. A. Jimenez

IEEE Transactions on Computers. 2014. Vol. 63, num. 3, p. 543 - 556. DOI : 10.1109/Tc.2012.238.

BuMP: Bulk Memory Access Prediction and Streaming

S. VolosJ. PicorelB. FalsafiB. Grot

2014. 47th Annual IEEE/ACM International Symposium on Microarchitecture, December 13-17, 2014. p. 545 - 557. DOI : 10.1109/MICRO.2014.44.

Resolve: Enabling Accurate Parallel Monitoring under Relaxed Memory Models

E. VlachosS. FytrakiP. B. GibbonsM. A. KozuchB. Falsafi

2014

Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache

D. JevdjicG. H. LohC. KaynakB. Falsafi

2014. 47th Annual IEEE/ACM International Symposium on Microarchitecture, Cambridge, UK, December 13-17, 2014. p. 25 - 37. DOI : 10.1109/MICRO.2014.51.

FADE: A Programmable Filtering Accelerator for Instruction-Grain Monitoring

S. FytrakiE. VlachosO. KocberberB. FalsafiB. Grot

2014. 20th IEEE International Symposium On High Performance Computer Architecture (HPCA-2014), Orlando, Florida, USA, February 15-19, 2014. p. 108 - 119. DOI : 10.1109/HPCA.2014.6835922.

Architectural Support to Accelerate Fine-Grain Program Monitoring

S. Fytraki / B. Falsafi (Dir.)

Lausanne, EPFL, 2014. DOI : 10.5075/epfl-thesis-6257.

Big Data

B. FalsafiB. Grot

IEEE Micro. 2014. Vol. 34, num. 4, p. 4 - 5. DOI : 10.1109/MM.2014.65.

Towards stable cloud performance

D. Novakovic / B. FalsafiD. Kostic (Dir.)

Lausanne, EPFL, 2014. DOI : 10.5075/epfl-thesis-6261.

Scale-Out NUMA

S. NovakovicA. DaglisE. BugnionB. FalsafiB. Grot

2014. Nineteenth International Conference on Architectural Support for Programming Languages and Operating Systems, Salt Lake City, Utah, USA, March 1-5, 2014. DOI : 10.1145/2541940.2541965.