Flexus encompasses both a simulation infrastructure and
default simulation models. A simulator is composed of
individual modules that are hooked together during
compilation. A module is often the equivalent of a single
hardware structure - for example, a branch predictor or
a cache. A key strength of Flexus is its isolation of
components: one implementation of a particular module
can be swapped for a different implementation without
requiring changes to any other modules.
This flexibility also allows a particular simulator to be
tailored to the needs of a specific research hypothesis.
If memory system performance is being evaluated, a simple
bandwidth-based processor pipeline might be sufficient.
Conversely, a study that closely examines microarchitecture
could use a simple memory model. The Flexus core provides
services, such as scheduling and statistics, that are common
and useful to all simulators.
Virtutech
Simics enables full-system
simulation. Simics is a functional simulator that allows
unmodified commercial operating systems and applications to
boot and run. Flexus can hook into Simics and see the
instruction stream that a real system would execute.
Flexus can also control Simics' timing, so as to model
out-of-order effects and speculative techniques.
Key Features
Download Flexus 4.1.0
Flexus is a family of component-based C++ computer architecture simulators that
build on Virtutech Simics' Micro-Architecture Interface (MAI) to enable
full-system timing-accurate simulation of uni- and multiprocessor systems running
unmodified commercial applications and operating systems.