Reader 1: Introduction |
|
- Chapter 1: Culler and Singh, Parallel Computer Architecture
|
Reader 2: Parallel Computing |
|
- Chapter 1: Culler and Singh, Parallel Computer Architecture
|
|
- Introduction to OpenMP, by Piotr Luszczek
|
Reader 3: Cache Coherence |
|
- Chapter 5, Sections 5.2 & 5.4: Culler and Singh, Parallel Computer Architecture
|
|
- Chapter 6, Sections 6.2 & 6.3 : Culler and Singh, Parallel Computer Architecture
|
|
- Chapter 8, Sections 8.2 & 8.3 : Culler and Singh, Parallel Computer Architecture
|
Reader 4: Memory Consistency |
|
- Sequential Consistency section 5.3: Culler and Singh, Parallel Computer Architecture
|
|
- Relaxed Consistency Models section 9.2: Culler and Singh, Parallel Computer Architecture
|
|
- Sarita Adve and Kourosh Gharachorloo, Shared Memory Consistency Models: A Tutorial, IEEE Computer, pp 66-76, Dec. 1996.
|
Reader 5: Synchronization |
|
- Synchronization section 5.6: Culler and Singh, Parallel Computer Architecture
|
Reader 6: Transactional Memory |
|
- Chapter 1 & 2: Haris, Larus and Rajwar, Transactional Memory, 2nd Edition
|
Reader 7: GPUs |
|
- The Rise of the Graphics Processor, David Blythe, Proceedings of the IEEE, 2008
|