Overview

With the end of Dennard Scaling and a slowdown in Moore's Law, network fabrics and storage capacity have been improving at faster rates than logic density in recent years. As such to mitigate the impending logic speed bottleneck, a careful integration and specialisation of computation and data services has emerged as a promising approach to improving performance, cost and efficiency in servers. The Vertically-Integrated Server Architecture (VISA) project seeks server architectures where common services in datacenters are implemented through a cross-layer integration and specialisation from algorithms all the way down to silicon and data movement is minimised through a tighter coupling of logic with emerging storage and the network technologies.

Publications

S. Gupta, A. Bhattacharyya, Y. Oh, A. Bhattacharjee, B. Falsafi, and M. Payer, Rebooting Virtual Memory with Midgard, The 48th International Symposium on Computer Architecture (ISCA '21'), Online conference, June 14-19, 2021.
[detailed record] [bibtex]

J. Picorel, S. Kohroudii, Z. Yan, A. Bhattacharjee, B. Falsafi, and D. Jevdjic, SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators, arXiv:2001.07045 [cs.AR], 2020.
[detailed record] [bibtex]

S. Gupta, A. Daglis, and B. Falsafi, Distributed Logless Atomic Durability with Persistent Memory, The 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-52), Columbus, OH, USA, October 12–16, 2019.
[detailed record] [bibtex]

M. Sadrosadati, A. Mirhosseini, S. Ehsani, H. Sarbazi-Azad, M. Drumond, B. Falsafi, R. Ausavarungnirun, and O. Mutlu, LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching, Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2018.
[detailed record] [bibtex]

D. Ustiugov, A. Daglis, J. Picorel, M. Sutherland, E. Bugnion, B. Falsafi, and D. Pnevmatikatos, Enabling Storage Class Memory as a DRAM Replacement for Datacenter Services, arXiv:1801.06726 [cs.AR], 2018.
[detailed record] [bibtex]

B. Falsafi, B. Dally, D. Singh, D. Chiou, J. J. Yi, and R. Sendag, FPGAs versus GPUs in Data centers, IEEE Micro, 2017.
[detailed record] [bibtex]

S. Volos, D. Jevdjic, B. Falsafi, and B. Grot, Fat Caches for Scale-Out Servers, IEEE Micro, 2018.
[detailed record] [bibtex]

J. Picorel, D. Jevdjic, and B. Falsafi, Near-Memory Address Translation, Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques (PACT), 2017.
[detailed record] [bibtex]

B. Falsafi, M. Stan, K. Skadron, N. Jayasena, Y. Chen, J. Tao, R. Nair, J.H. Moreno, N. Muralimanohar, K. Sankaralingam, and C. Estan, Near-Memory Data Services, IEEE Micro, 2016.
[detailed record] [bibtex]

M. Drumond, A. Daglis, N. Mirzadeh, D. Ustiugov, J. Picorel, B. Falsafi, B. Grot, and D. Pnevmatikatos, The Mondrian Data Engine, The 44th International Symposium on Computer Architecture, 2017.
[detailed record] [bibtex]

A. Pahlevan, J. Picorel, A. P. Zarandi, D. Rossi, M. Zapater, A. Bartolini, P. Del Valle, D. Atienza, L. Benini, and B. Falsafi, Towards near-threshold server processors, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016.
[detailed record] [bibtex]

O. Kocberber, B. Falsafi, and B. Grot, Asynchronous Memory Access Chaining, Proceedings of the VLDB Endowment, Volume 9 Issue 4, 2015.
[detailed record] [bibtex]

N. Mirzadeh, O. Kocberber, B. Falsafi, and B. Grot, Sort vs. Hash Join Revisited for Near-Memory Execution, 5th Workshop on Architectures and Systems for Big Data (ASBD), 2015.
[detailed record] [bibtex]

D. Jevdjic, G.H. Loh, C. Kaynak, and B. Falsafi, Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache, Proceedings of the 47th International Symposium on Microarchitecture (MICRO), 2014.
[detailed record] [bibtex]

S. Volos, J. Picorel, B. Falsafi, and B. Grot, BuMP: Bulk Memory Access Prediction and Streaming, Proceedings of the 47th International Symposium on Microarchitecture (MICRO), 2014.
[detailed record] [bibtex]

M. Ferdman, A. Adileh, O. Kocberber, S. Volos, M. Alisafaee, D. Jevdjic, C. Kaynak, A.D. Popescu, A. Ailamaki, and B. Falsafi, A Case for Specialized Processors for Scale-Out Workloads, IEEE Micro Top Picks, 2014.
[detailed record] [bibtex]

S. Novakovic, A. Daglis, E. Bugnion, B. Falsafi, and B. Grot, Scale-Out NUMA, Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2014.
[detailed record] [bibtex]

O. Kocberber, B. Grot, J. Picorel, B. Falsafi, K. Lim, and P. Ranganathan, Meet the Walkers: Accelerating Index Traversals for In-Memory Databases, Proceedings of the 46th International Symposium on Microarchitecture (MICRO), 2013.
[detailed record] [bibtex]

D. Jevdjic, S. Volos, and B. Falsafi, Die-Stacked DRAM Caches for Servers: Hit Ratio, Latency, or Bandwidth? Have It All with Footprint Cache, Proceedings of the 40th Annual International Symposium on Computer Architecture (ISCA), 2013.
[detailed record] [bibtex]

P. Lotfi-Kamran, B. Grot, and B. Falsafi, NOC-Out: Microarchitecting a Scale-Out Processor, Proceedings of the 45th International Symposium on Microarchitecture (MICRO), 2012.
[detailed record] [bibtex]

B. Grot, D. Hardy, P. Lotfi-Kamran, C. Nicopoulos, Y. Sazeides, and B. Falsafi, Optimizing Datacenter TCO with Scale-Out Processors., IEEE Micro, Vol. 32, Nr. 5, 2012.
[detailed record] [bibtex]

O. Kocberber, B. Falsafi, K. Lim, P. Ranganathan, and S. Harizopoulos, Dark Silicon Accelerators for Database Indexing, 1st Dark Silicon Workshop (DaSi), 2012.
[detailed record] [bibtex]

P. Lotfi-Kamran, B. Grot, M. Ferdman, S. Volos, O. Kocberber, J. Picorel, A. Adileh, D. Jevdjic, S. Idgunji, E. Ozer, and B. Falsafi, Scale-Out Processors, Proceedings of the 39th Annual International Symposium on Computer Architecture (ISCA), 2012.
[detailed record] [bibtex]

S. Volos, C. Seiculescu, B. Grot, N. Khosro Pour, B. Falsafi, and G. De Micheli, CCNoC: Specializing On-Chip Interconnects for Energy Efficiency in Cache-Coherent Servers, Proceedings of the 6th International Symposium on Networks-on-Chip (NOCS), 2012.
[detailed record] [bibtex]

M. Ferdman, A. Adileh, O. Kocberber, S. Volos, M. Alisafaee, D. Jevdjic, C. Kaynak, A.D. Popescu, A. Ailamaki, and B. Falsafi, Clearing the Clouds: A Study of Emerging Scale-out Workloads on Modern Hardware, Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2012. (recognized as Best Paper by the program committee)
[detailed record] [bibtex]

N. Hardavellas, M. Ferdman, B. Falsafi, and A. Ailamaki, Toward Dark Silicon in Servers, IEEE Micro, Vol. 31, Nr. 4, pp. 6 - 15, 2011.
[detailed record] [bibtex]

C. Seiculescu, S. Volos, N. Khosro Pour, B. Falsafi, and G. De Micheli, CCNoC: On-Chip Interconnects for Cache-Coherent Manycore Server Chips, Proceedings of the Workshop on Energy-Efficient Design (WEED), 2011.
[detailed record] [bibtex]

M. Ferdman, P. Lotfi-Kamran, K. Balet, and B. Falsafi, Cuckoo Directory: Efficient and Scalable CMP Coherence, Proceedings of the 17th IEEE International Symposium on High Performance Computer Architecture (HPCA), 2011.
[detailed record] [bibtex]

P. Lotfi-Kamran, M. Ferdman, D. Crisan, and B. Falsafi, TurboTag: Lookup Filtering to Reduce Coherence Directory Power, Proceedings of the 16th International Symposium on Low Power Electronics and Design (ISLPED), 2010.
[detailed record] [bibtex]