Course Info
| Lectures | Tuesdays 5:15pm to 7:00pm in CO1 |
|---|---|
| Labs & Exercises | Wednesdays 8:00am-noon (see Moodle) |
| Web Page | moodle.epfl.ch |
| Instructor | Mirjana Stojilovic |
| Email, URL | mirjana.stojilovic /at/ epfl.ch, https://people.epfl.ch/mirjana.stojilovic |
| Office | INJ 235 |
| Assistant | Ali Ansari |
| Email, URL | ali.ansari /at/ epfl.ch, https://people.epfl.ch/ali.ansari |
| Office | INJ 215 |
| Assistant | Ayatallah Elakhras |
| Email, URL | ayatallah.elakhras /at/ epfl.ch, https://people.epfl.ch/ayatallah.elakhras |
| Office | INF 132 |
| Assistant | Ognjen Glamocanin |
| Email, URL | ognjen.glamocanin /at/ epfl.ch, https://people.epfl.ch/ognjen.glamocanin |
| Office | INJ 238 |
| Assistant | Shanqing Lin |
| Email, URL | shanqing.lin /at/ epfl.ch, https://people.epfl.ch/shanqing.lin |
| Office | INJ 215 |
| Assistant | Dina Mahmoud |
| Email, URL | dina.mahmoud /at/ epfl.ch, https://people.epfl.ch/dina.mahmoud |
| Office | INJ 239 |
| Assistant | Shashwat Shrivastava |
| Email, URL | shashwat.shrivastava /at/ epfl.ch, https://people.epfl.ch/shashwat.shrivastava |
| Office | INJ 215 |
| Assistant | Louis Coulon |
| Email, URL | louis.coulon /at/ epfl.ch, https://people.epfl.ch/louis.coulon |
| Office | INF 139 |
| Assistant | Sachin Basil John |
| Email, URL | sachin.basiljohn /at/ epfl.ch, https://people.epfl.ch/sachin.basiljohn |
| Office | BC 214 |
| Admin. Assistant | Stephanie Baillargues |
| stephanie.baillargues /at/ epfl.ch | |
| Office | INJ 234 |
Computer Architecture I
The course introduces the students to the basic notions of computer architecture and, in particular, to the choices of the Instruction Set Architecture and to the memory hierarchy of modern systems.Course content:
- Complex digital systems in VHDL
- Basic components of a computer
- Instruction Set Architectures
- Assembly-level programming
- Multi-cycle implementation of processors
- Caches
- Virtual memory
Learning outcomes
By the end of the course, the student must be able to- Design and implement a processor at the Register Transfer Level using logic synthesizers and simulators.
- Develop assembly language programs.
- Justify the organization of a modern memory system including cache hierarchies and virtual memory.
- Design and implement a cache memory.
Prerequisites
Digital Systems Design (CS-173)Grading
The final grade is derived as follows:|
Labs Quizzes Written exam |
24% 6% 70% |