In the last decade, large-scale voice and image applications have driven phenomenal breakthroughs in deep learning algorithms that we all use in our daily interactions with internet service providers. More recently, several different industry verticals, including HPC and Science, have started to rapidly adopt similar AI approaches, but their needs extend well beyond the standard datacenter consumer applications. These new uses of AI and ML involve complex and noisy multi-sensor data, sparsely labeled ground truth, hard constraints, and complex deployment environments that span from the edge to the cloud. The relationship of ML with the real world infrastructure is intricate and goes both ways, and this talk presents two illustrative examples. In one direction, we need to design the right data pipelines to feed the data to the ML process. So, the first example discusses “infrastructure for AI/ML”: an architecture blueprint for ML in Autonomous Driving applications that spans from instrumented test cars (at the edge) to the training core (in the cloud). In the other direction, ML can help to optimize the infrastructure itself. The second example discusses “AI/ML for infrastructure”: the use of ML for operational intelligence (AI-Ops) to automate the predictive maintenance in a high-performance datacenter where AI-Ops takes a holistic view which includes IT telemetry and facility sensors at the edge of the datacenter. The talks concludes with a discussion on the challenges than next-generation AI accelerators are going to pose to the data piepeline that feeds them, and points to some research directions to explore.
Paolo Faraboschi is Vice President and HPE Fellow, and currently leads the “AI Lab” group in Hewlett Packard Labs, developing novel end-to-end AI technology and advanced solutions. He previously led HPE’s Exascale research, as the co-PI of the “PathForward” program in collaboration with the US DoE (2017-2019). He also researched how to build better memory-driven systems, leading The Machine hardware architecture (2014-2017). Previously (2009-2014). he worked on low-energy servers (project Moonshot), led research on scalable simulation (2004-2008), and was the architect of the Lx/ST200 family of VLIW cores for consumer SoCs (1995-2003). He is an IEEE Fellow (2014) and an active member of the computer architecture community. He holds 45 patents, over 100 publications, and a Ph.D. in EECS from University of Genoa (Italy).