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Journal Paper

2016

H. Farbeh, N.S. Mirzadeh, N.F. Ghalaty, S.-G. Miremadi, M. Fazeli and H. Asadi, A Cache-Assisted Scratchpad Memory for Multiple-Bit-Error Correction, Ieee Transactions On Very Large Scale Integration (Vlsi) Systems, Vol. 24, Nr. 11, pp. 3282-3295, 2016.
[detailed record] [bibtex]

B. Falsafi, Near-Memory Data Services, Ieee Micro, Vol. 36, Nr. 1, pp. 6-7, 2016.
[detailed record] [bibtex]

2015

O. Kocberber, B. Falsafi and B. Grot, Asynchronous memory access chaining, Proceedings of the VLDB Endowment, Vol. 9, Nr. 4, pp. 252-263, 2015.
[detailed record] [bibtex]

2014

B. Falsafi and B. Grot, Big Data, IEEE Micro, special issue on Big Data, Vol. 34, Nr. 4, pp. 4-5, 2014.
[detailed record] [bibtex]

M. Ferdman, A. Adileh, O. Kocberber, S. Volos, M. Alisafaee, D. Jevdjic, C. Kaynak, A.D. Popescu, A. Ailamaki and B. Falsafi, A Case for Specialized Processors for Scale-Out Workloads, IEEE Micro Top Picks, Vol. 34, Nr. 3, pp. 31-42, 2014.
[detailed record] [bibtex]

H. Kim, B. Grot, P.V. Gratz and D.A. Jimenez, Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip, IEEE Transactions on Computers, Vol. 63, Nr. 3, pp. 543-556, 2014.
[detailed record] [bibtex]

2013

I. Sourdis, C. Strydis, A. Armato, C.S. Bouganis, B. Falsafi, G.N. Gaydadjiev, S. Isaza, A. Malek, R. Mariani, D.N. Pnevmatikatos, D.K. Pradhan, G.K. Rauwerda, R.M. Seepers, R.A. Shafik, K. Sunesen, D. Theodoropoulos, S. Tzilis and M. Vavouras, DeSyRe: On-demand system reliability, Microprocessors and Microsystems - Embedded Hardware Design, Vol. 37, Nr. 8, pp. 981-1001, 2013.
[detailed record] [bibtex]

B. Falsafi and G.H. Loh, TOP PICKS FROM THE 2012 COMPUTER ARCHITECTURE CONFERENCES Introduction, IEEE Micro, Vol. 33, Nr. 3, pp. 4-7, 2013.
[detailed record] [bibtex]

2012

M. Ferdman, A. Adileh, O. Kocberber, S. Volos, M. Alisafaee, D. Jevdic, C. Kaynak, A.D. Popescu, A. Ailamaki and B. Falsafi, Quantifying the Mismatch between Emerging Scale-Out Applications and Modern Processors, ACM Transactions on Computer Systems, Vol. 30, Nr. 4, 2012.
[detailed record] [bibtex]

B. Grot, D. Hardy, P. Lotfi-Kamran, B. Falsafi, C. Nicopoulos and Y. Sazeides, Optimizing Data-Center TCO with Scale-Out Processors, IEEE Micro, Vol. 32, Nr. 5, pp. 52-63, 2012.
[detailed record] [bibtex]

2011

N. Hardavellas, M. Ferdman, B. Falsafi and A. Ailamaki, Toward Dark Silicon in Servers, IEEE Micro, Vol. 31, Nr. 4, pp. 6 - 15, 2011.
[detailed record] [bibtex]

2010

C. Kaynak, O. Kocberber and O. Ergin, Reducing the Energy Dissipation of the Issue Queue by Exploiting Narrow Immediate Operands, Journal of Circuits, Systems and Computers, Vol. 19, Nr. 8, 2010.
[detailed record] [bibtex]

N. Hardavellas, M. Ferdman, B. Falsafi and A. Ailamaki, Near-Optimal Cache Block Placement with Reactive Nonuniform Cache Architectures, IEEE Micro Top Picks, Vol. 30, Nr. 1, pp. 20-29, 2010.
[detailed record] [bibtex]

T.F. Wenisch, M. Ferdman, A. Ailamaki, B. Falsafi and A. Moshovos, Making Address-Correlated Prefetching Practical, IEEE Micro Top Picks, Vol. 30, Nr. 1, pp. 50-59, 2010.
[detailed record] [bibtex]

2009

S. Chen, M. Kozuch, P.B. Gibbons, M. Ryan, T. Strigkos, T.C. Mowry, O. Ruwase, E. Vlachos, B. Falsafi and V. Ramachandran, Flexible Hardware Acceleration for Instruction-Grain Lifeguards, IEEE Micro Top Picks, Vol. 29, Nr. 1, pp. 62-72, 2009.
[detailed record] [bibtex]

E.S. Chung, M.K. Papamichael, E. Nurvitadhi, J.C. Hoe, B. Falsafi and K. Mai, ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs, ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 2, Nr. 15, 2009.
[detailed record] [bibtex]

2008

B. Falsafi and P. Felber, Workshop on Transactional Computing (TRANSACT 2008) - Introduction, Acm Sigplan Notices, Vol. 43, pp. 10-10, 2008.
[detailed record] [bibtex]

2007

M. Hosseinabady, P. Lotfi-Kamran and Z. Navabi, Low test application time resource binding for behavioral synthesis, ACM Transactions on Design Automation of Electronic Systems, Vol. 12, Nr. 2, pp. 16, 2007.
[detailed record] [bibtex]

M. Hosseinabady, P. Lotfi-Kamran, F. Lombardi and Z. Navabi, Low Overhead DFT Using CDFG by Modifying Controller, IET computers & digital techniques, Vol. 1, Nr. 4, pp. 322-333, 2007.
[detailed record] [bibtex]

2006

R.E. Wunderlich, T.F. Wenisch, B. Falsafi and J.C. Hoe, Statistical sampling of microarchitecture simulation, ACM Transactions on Modeling and Computer Simulation, Vol. 16, Nr. 3, pp. 197 - 224, 2006.
[detailed record] [bibtex]

S.W. Kim, C.-L. Ooi, R. Eigenmann, B. Falsafi and T.N. Vijaykumar, Exploiting reference idempotency to reduce speculative storage overflow, ACM Transactions on Programming Languages and Systems, Vol. 28, Nr. 5, pp. 942 - 965, 2006.
[detailed record] [bibtex]

A. Fern, R. Givan, B. Falsafi and T.N. Vijaykumar, Dynamic feature selection for hardware prediction, Journal of Systems Architecture, Vol. 52, Nr. 4, pp. 213 - 234, 2006.
[detailed record] [bibtex]

J.F. Cantin, J.E. Smith, M.H. Lipasti, A. Moshovos and B. Falsafi, Coarse-grain coherence tracking: RegionScout and region coherence arrays, IEEE Micro Special Issue on Top Picks from Computer Architecture Conferences, Vol. 26, Nr. 1, pp. 70 - 79, 2006.
[detailed record] [bibtex]

T.F. Wenisch, R.E. Wunderlich, M. Ferdman, A. Ailamaki, B. Falsafi and J.C. Hoe, SimFlex: Statistical Sampling of Computer System Simulation, IEEE Micro, Vol. 26, Nr. 4, pp. 18-31, 2006.
[detailed record] [bibtex]

2005

A. Moshovos, B. Falsafi, F.N. Najm and N. Azizi, A case for asymmetric-cell cache memories, IEEE Transactions on Very Large Scale Integration Systems, Vol. 13, Nr. 7, pp. 877 - 881, 2005.
[detailed record] [bibtex]

B. Falsafi and D.A. Wood, Evaluating scheduling policies for fine-grain communication protocols on a cluster of SMPs, Journal of Parallel and Distributed Computing, Vol. 65, Nr. 4, pp. 464 - 478, 2005.
[detailed record] [bibtex]

B.T. Gold, J. Kim, J.C. Smolens, E. Chung, V. Liaskovitis, E. Nurvitadhi, B. Falsafi, J.C. Hoe and A.G. Nowatzyk, TRUSS: A Reliable, Scalable Server Architecture, IEEE Micro Special Issue on Reliability-Aware Microarchitectures, Vol. 25, Nr. 6, pp. 51-59, 2005.
[detailed record] [bibtex]

2004

N. Hardavellas, S. Somogyi, T.F. Wenisch, R.E. Wunderlich, S. Chen, J. Kim, B. Falsafi, J.C. Hoe and A.G. Nowatzyk, SimFlex: a fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture, Performance Evaluation Review, Vol. 31, Nr. 4, pp. 31 - 5, 2004.
[detailed record] [bibtex]

J.C. Smolens, B.T. Gold, J. Kim, B. Falsafi, J.C. Hoe and A.G. Nowatzyk, Fingerprinting: Bounding the Soft-Error Detection Latency and Bandwidth, IEEE Micro Special Issue on Top Picks from Computer Architecture Conferences, Vol. 24, Nr. 6, pp. 22-29, 2004.
[detailed record] [bibtex]

2003

C. Gniady and B. Falsafi, Speculative Sequential Consistency with Little Custom Storage, Journal of Instruction-Level Parallelism, Vol. Vol. 5, 2003.
[detailed record] [bibtex]

2002

A.-C. Lai and B. Falsafi, Optimizing traffic in DSM clusters: fine-grain memory caching versus page migration/replication, Theory of Computing Systems, Vol. 35, Nr. 3, pp. 269 - 87, 2002.
[detailed record] [bibtex]

2001

M.D. Powell, S.-H. Yang, B. Falsafi, K. Roy and T.N. Vijaykumar, Reducing leakage in a high-performance deep-submicron instruction cache, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 9, Nr. 1, pp. 77 - 89, 2001.
[detailed record] [bibtex]

2000

S.S. Mukherjee, S.K. Reinhardt, B. Falsafi, M. Litzkow, M.D. Hill, D.A. Wood, S. Huss-Lederman and J.R. Larus, Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator, IEEE Concurrency, Vol. 8, Nr. 4, pp. 12 - 20, 2000.
[detailed record] [bibtex]

1997

B. Falsafi and D.A. Wood, Modeling cost/performance of a parallel computer simulator, ACM Transactions on Modeling and Computer Simulation, Vol. 7, Nr. 1, pp. 104 - 130, 1997.
[detailed record] [bibtex]

1994

D.A. Wood, S. Chandra, B. Falsafi, M.D. Hill, J.R. Larus, A.R. Lebeck, J.C. Lewis, S.S. Mukherjee, S. Palacharla and S.K. Reinhardt, Mechanisms for Cooperative Shared Memory, CMG Transactions, 1994.
[detailed record] [bibtex]

Unknown year

C. Gniady, B. Falsafi and T.N. Vijaykumar, Is SC+ILP=RC?, Readings in Computer Architecture.
[detailed record] [bibtex]



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