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Readings

Reader 1: Introduction
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  • Chapter 1: Culler and Singh, Parallel Computer Architecture
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  • Chapter 4: D. Patterson and J. Hennessy, Computer Organization and Design 3rd ed.
Reader 2: Cache Coherence
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  • Chapter 5: Culler and Singh, Parallel Computer Architecture
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  • Chapter 6: Culler and Singh, Parallel Computer Architecture
Reader 3: CMP
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  • Olukotun & Hammond & Laudon's ChipMultiprocessor Architecture: Techniques to Improve Throughput and Latency
Reader 4: Memory Ordering and Synchronization
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  • Synchronization section 5.5: Culler and Singh, Parallel Computer Architecture
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  • Sequential Consistency section 5.2: Culler and Singh, Parallel Computer Architecture
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  • Relaxed Consistency Models section 9.1: Culler and Singh, Parallel Computer Architecture
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  • Sarita Adve and Kourosh Gharachorloo, Shared Memory Consistency Models: A Tutorial, IEEE Computer, pp 66-76, Dec. 1996.
Reader 5: Interconnects
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  • Chapter 10: Culler and Singh, Parallel Computer Architecture
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  • Chapters 1,2, and 6: Jerger and Peh's On-Chip Networks